Unisplendour FPGA Products | BeiLuo Distributor

About FPGA Products

Unisplendour FPGA portfolio includes CPLD, low-cost FPGA, and high-performance SoC FPGA devices for communications, industrial, and automotive applications.

As an authorized distributor of Unisplendour, BeiLuo provides a comprehensive range of FPGA Products products. These products are widely used in industrial control, automotive electronics, consumer electronics, and communication equipment. We offer a complete product line with multiple series to meet various application requirements. All products are genuine and original, backed by professional technical support and comprehensive after-sales service.

Selection Guide: How to Choose the Right FPGA Products

Product List

2 products available

Part Number ↕	Logic Elements ↕	DSP Blocks ↕	Memory ↕	Transceivers ↕	Processor ↕	Package ↕	Stock Status	Action
PGT180H	180,000	800 (18x25 multipliers)	13.5 Mbit embedded RAM	16 channels @ 12.5 Gbps	Dual-core ARM Cortex-A9 @ 800MHz	-	In Stock	View Details
PGL50H	50,000	120 (18x18 multipliers)	2.7 Mbit embedded RAM	-	-	-	In Stock	View Details

Need FPGA Products Products?

Download Datasheet Request Samples Get Quote Contact FAE

Frequently Asked Questions

How do I choose between CPLD and FPGA?

Choose CPLD (Compact series) for simple combinational logic, glue logic, and small state machines with deterministic timing. CPLDs offer instant-on configuration, low power, and predictable delays. Choose FPGA (Logos/Titan series) for complex designs requiring 1000+ logic elements, DSP functions, memory blocks, or high-speed interfaces. FPGAs offer greater capacity, embedded functions, and flexibility but have more complex power-up configuration. For designs under 500 logic elements with simple requirements, CPLD is usually more cost-effective.

Use CPLD for simple logic under 500 elements. Use FPGA for complex designs requiring DSP or memory.

What development tools are available for Unisplendour FPGA?

Unisplendour provides the Pango Design Suite (PDS) for FPGA development. PDS includes design entry tools supporting VHDL, Verilog, and schematic capture, synthesis engine optimized for Unisplendour architectures, place and route with timing analysis, simulation integration with ModelSim, and programming and debugging tools. The software supports Windows and Linux platforms. IP cores library includes commonly used functions like PCIe, DDR controllers, and Ethernet MAC. Evaluation boards are available for major device families.

Download Pango Design Suite from Unisplendour website. Contact BeiLuo for evaluation board recommendations.

How do I estimate resource requirements for my FPGA design?

Estimate FPGA resources by analyzing your design: Count flip-flops for registers and state machines. Count LUTs for combinational logic (typically 4-6 LUTs per complex logic function). Add DSP blocks for multipliers and MAC operations. Calculate memory requirements for RAM and FIFOs. Add 20-30% margin for routing and future expansion. Pango Design Suite provides resource estimation during synthesis. Start with a larger device for prototyping, then optimize for production. BeiLuo FAEs can review your design requirements and recommend appropriate devices.

Use synthesis tool estimates. Add 30% margin. Prototype with larger device, optimize for production.

What are the power requirements for Unisplendour FPGAs?

Unisplendour FPGA power requirements vary by series and utilization: Compact CPLDs typically require 50-200mW. Logos FPGAs range from 0.5W to 3W depending on size and activity. Titan SoC FPGAs can require 5-15W for high-performance configurations. Power supplies needed: Core voltage (1.0V or 1.2V depending on device), I/O voltage (1.8V, 2.5V, 3.3V), and auxiliary voltage (2.5V or 3.3V). Pango Design Suite provides power estimation tools. Consider thermal management for devices dissipating >2W.

Use PDS power estimator. Plan thermal management for >2W devices. Use multiple rails for clean power.

How do I program and configure Unisplendour FPGAs?

Unisplendour FPGAs support multiple configuration modes: Active Serial (AS) from external SPI flash, Passive Serial (PS) from external processor, JTAG for debugging and programming, and internal configuration for SoC devices with embedded flash. Configuration bitstream is generated by Pango Design Suite. Use USB-Blaster or compatible programmer for JTAG. SPI flash can be programmed in-system or pre-programmed. SoC FPGAs can boot from internal flash then load larger bitstream from external memory.

Use SPI flash for standalone operation. Use JTAG for development. Use PS mode for processor-controlled configuration.