EV Traction Inverter Solution

EV traction inverters using Gejian SiC MOSFETs typically achieve 1.5-2.5% higher efficiency compared to equivalent IGBT designs. For a typical EV traction inverter, peak efficiency with SiC is 98.5-99.5% compared to 96-97% with IGBTs. This efficiency improvement comes from two main factors: First, SiC MOSFETs have significantly lower switching losses due to the absence of tail current during turn-off. At 10kHz switching frequency, switching losses can be reduced by 60-80%. Second, SiC has lower conduction losses at light loads due to the resistive output characteristic. For an EV with 400km range, a 2% efficiency improvement translates to approximately 8-10km additional range. The efficiency advantage is most pronounced at light loads (20-50% of rated power) where EVs operate most of the time. the lower losses enable smaller, lighter cooling systems, further improving vehicle efficiency and packaging.

Expect 1.5-2.5% efficiency improvement with SiC over IGBTs. Greater benefits at light loads where EVs typically operate. Contact our FAE team for efficiency calculations.

Switching frequency selection for SiC traction inverters involves trade-offs between efficiency, passive component size, and motor performance. At lower frequencies (8-12kHz), switching losses are minimized, maximizing efficiency and range. This is ideal for applications where maximum efficiency is the priority. At higher frequencies (15-20kHz), motor current ripple is reduced, resulting in lower motor losses and smoother torque. The higher frequency also moves audible noise above the most sensitive range of human hearing. However, higher frequencies increase switching losses, though SiC's low switching losses make higher frequencies feasible. For most EV applications, 12-16kHz provides a good balance - efficiency remains high (>98%) while motor performance and NVH (noise, vibration, harshness) are improved. The ability to operate efficiently at higher frequencies is one of SiC's key advantages over IGBTs, which typically suffer significant efficiency degradation above 10kHz.

Use 8-12kHz for maximum efficiency, 15-20kHz for improved motor performance and NVH. Contact our FAE team for switching frequency optimization.

Proper PCB layout is critical for SiC traction inverters due to the high switching speeds involved. Key considerations include: First, minimize the gate drive loop inductance by placing gate drivers as close as possible to the SiC MOSFETs. Use wide, short traces for gate connections and implement Kelvin source connections. Second, minimize the power loop inductance between DC link capacitors and SiC devices. Use laminated bus structures or parallel plate configurations to reduce inductance. Target less than 20nH total power loop inductance. Third, place DC link film capacitors extremely close to the SiC modules to minimize high-frequency current loops. Fourth, implement proper grounding with separate power and control ground planes connected at a single point. Fifth, use shielding and careful routing to isolate high dv/dt nodes from sensitive control circuits. Sixth, ensure adequate creepage and clearance distances for the high-voltage isolation barriers. Gejian provides reference layouts and can review customer layouts for optimization.

Minimize gate and power loop inductance, use Kelvin connections, place capacitors close to devices. Contact our FAE team for layout review and optimization.

Comprehensive protection is essential for reliable SiC traction inverter operation. Overcurrent protection should use phase current sensors with fast response (<10μs) to detect and respond to fault conditions. Desaturation detection is critical for short circuit protection - the threshold should be set based on the maximum expected VDS (ID × RDS(on)) plus margin, typically 6-9V. The GJGD1201S gate driver includes desaturation detection with soft shutdown. Overvoltage protection should clamp voltage spikes from stray inductance using TVS diodes or active clamp circuits. The DC bus voltage should be monitored with undervoltage and overvoltage thresholds. Overtemperature protection using multiple temperature sensors (module baseplate, coolant inlet/outlet, ambient) should implement derating and shutdown at appropriate thresholds. For functional safety, implement redundant current sensing and independent safety monitoring. All protection events should be logged for diagnostic purposes. The fast switching of SiC requires protection circuits to respond quickly - hardware protection should act within 5-10μs.

Implement fast overcurrent and desaturation protection. Use multiple temperature sensors for thermal management. Contact our FAE team for protection design guidelines.

Liquid cooling is the standard approach for EV traction inverters using SiC MOSFETs. Despite SiC's lower losses compared to IGBTs, effective cooling is still essential for maintaining safe junction temperatures, especially during peak power operation. A typical cooling system uses a 50/50 mixture of water and ethylene glycol as coolant, flowing through a cold plate attached directly to the SiC modules. The cold plate should have optimized flow channels to ensure uniform temperature distribution across all devices. Flow rates of 10-15 liters per minute are typical, with coolant inlet temperatures of 40-60°C. The cooling system should include redundant pumps for reliability, temperature sensors for monitoring, and a radiator to dissipate heat to ambient. Thermal interface material with low thermal resistance (0.1-0.2°C/W) between the SiC modules and cold plate is critical. For the thermal design, calculate losses at worst-case conditions (peak power, maximum ambient) and ensure the cooling system can maintain junction temperatures below 150°C with appropriate margin.

Use liquid cooling with 50/50 water-glycol mixture. Design for worst-case thermal conditions with appropriate margin. Contact our FAE team for cooling system design.

Meeting automotive EMC requirements (CISPR 25, ISO 11452) with SiC traction inverters requires careful attention due to the high dv/dt and di/dt during switching. Key strategies include: First, implement a well-designed EMI filter on the DC input with common mode and differential mode filtering. The filter should be designed based on the expected conducted emissions spectrum. Second, use shielded cables for all high-power connections and ensure proper shield termination. Third, implement a Faraday cage or shielding enclosure for the inverter to contain radiated emissions. Fourth, use proper PCB layout techniques including ground planes, careful routing of high-speed signals, and isolation of noisy circuits from sensitive electronics. Fifth, implement snubber circuits or RC dampers across the SiC devices to reduce voltage overshoot and ringing. Sixth, control the switching speed through gate resistor selection to balance EMI vs efficiency - slower switching reduces EMI but increases losses. Pre-compliance testing during development is essential to identify and address EMC issues early. Gejian provides EMC design guidelines and can support customer EMC testing.

Implement comprehensive EMI filtering, shielding, and proper layout. Control switching speed to balance EMI vs efficiency. Contact our FAE team for EMC design support.