XLN80M120-SiC

In solar inverter applications, XLN80M120-SiC typically delivers 98.5% peak efficiency compared to 96-97% for equivalent IGBT designs - a 1.5-2.5% improvement. At 50kHz switching frequency, SiC switching losses are 30-50% lower than IGBT. For a 10kW inverter, this translates to 150-250W lower losses, reducing cooling requirements and improving energy harvest. The efficiency advantage is most pronounced at light loads (20-50% of rated power) where SiC maintains low conduction losses while IGBT Vce(sat) becomes proportionally higher. System-level benefits include smaller heatsinks (30-50% reduction), smaller filter inductors (due to higher switching frequency), and improved power density. The payback period for SiC premium is typically 1-2 years in commercial solar installations through increased energy production.

Contact our FAE team for efficiency modeling and ROI calculations for your specific application and operating profile.

Gate drive design is critical for SiC performance: Use +18V to +20V for turn-on to achieve datasheet Rds(on) - lower voltages increase on-resistance significantly. Use -2V to -4V for turn-off to prevent dv/dt induced turn-on through Miller capacitance. Gate driver must provide 6-8A peak current for fast switching - SiC can switch in 50ns vs 200ns for IGBT, requiring higher peak current. Include active Miller clamp circuit that activates during off-state to shunt Miller current to ground. Use gate resistors of 5-10 ohms to control switching speed and minimize ringing. Total gate loop inductance must be minimized - place driver within 2cm of module with wide, short traces. Use Kelvin source connection - separate power source terminal from gate drive return to avoid common source inductance issues that slow switching.

Our FAE team can provide gate drive circuit schematics and PCB layout recommendations for SiC modules.

SiC modules generate higher EMI than IGBT due to faster switching edges (dv/dt up to 50V/ns vs 10V/ns for IGBT): Conducted EMI - high di/dt in DC bus connections can cause significant conducted noise; use laminated busbars or closely spaced copper planes to minimize loop inductance. Radiated EMI - fast switching creates high-frequency radiation; use shielded enclosures and proper grounding techniques. Common-mode noise - high dv/dt couples capacitively to ground; use common-mode chokes on input/output cables. Mitigation strategies: Increase gate resistance slightly (from 5 to 10 ohms) to slow switching edges if EMI is problematic - this increases switching losses but reduces EMI. Add RC snubbers (10-47 ohm + 1-10nF) across module terminals to dampen ringing. Use proper filtering on DC input and AC output with high-frequency capacitors. Implement proper PCB layout with ground planes and minimize high-current loop areas.

Contact our FAE team for EMI troubleshooting and filter design recommendations for SiC-based systems.

Yes, XLN80M120-SiC modules can be paralleled, but current sharing requires more attention than with IGBT: SiC MOSFETs have positive temperature coefficient of Rds(on) - as temperature increases, resistance increases, which helps current sharing (hotter device carries less current). However, SiC has lower transconductance than IGBT, making dynamic current sharing more challenging during switching. For good parallel operation: Use modules from same production batch for matched Rds(on) and threshold voltage. Implement symmetrical layout with equal DC bus inductance and gate path impedance to all modules. Use individual gate resistors (5-10 ohms) for each module - do not share gate resistors. Consider using small source resistors (0.01-0.1 ohm) in each module path to improve current sharing at the cost of slight efficiency reduction. Start with derating to 80% of combined rating and characterize current sharing under actual operating conditions.

Our FAE team can provide detailed parallel operation guidelines and current sharing analysis for multi-module SiC designs.

XLN80M120-SiC is designed for 25-year service life in solar applications when operated within specifications. Key reliability factors: Junction temperature - keeping Tj below 125C (vs 175C maximum) significantly extends lifetime; Arrhenius equation predicts lifetime doubles for every 10C reduction. Gate oxide reliability - SiC gate oxide is thinner than silicon; use proper gate voltage clamping to prevent overvoltage stress. Thermal cycling - minimize thermal cycling by maintaining stable operating temperature; use thermal interface materials with good long-term stability. Field experience shows SiC modules have lower failure rates than IGBT in solar applications due to lower operating temperatures from reduced losses. Xinleineng provides 10-year warranty for SiC modules in solar applications, with expected field lifetime exceeding 25 years with proper thermal design.

Contact our FAE team for reliability modeling and thermal design optimization for maximum module lifetime.

SiC MOSFET on-resistance has positive temperature coefficient, increasing with junction temperature: At 25C: 80mOhm (datasheet typical value). At 100C: approximately 120mOhm (1.5x increase). At 150C: approximately 160mOhm (2x increase). This is different from IGBT where Vce(sat) increases only 10-15% over the same temperature range. The Rds(on) temperature coefficient is important for: Thermal design - calculate conduction losses at actual operating temperature, not just 25C datasheet value. Parallel operation - positive coefficient helps current sharing (hotter device has higher resistance, carries less current). Short-circuit protection - current is self-limiting as device heats up. For accurate loss calculations, use Rds(on) at expected operating junction temperature. At 100C junction (typical operating point), use 1.5x the 25C value for conservative thermal design.

Our FAE team can provide temperature-dependent loss models and thermal calculations for your specific operating conditions.