Arora FPGA Selection Guide - High-Performance Solutions for Demanding Applications
The Arora family is Gowin's high-performance FPGA lineup, offering significantly more resources than LittleBee devices for demanding applications. This guide will help you select the optimal Arora device for your project.
Arora Device Overview
The Arora family includes devices ranging from 18K to 55K LUTs: GW2A-18 (18,720 LUTs, 48 DSP blocks), GW2A-55 (54,720 LUTs, 128 DSP blocks). These SRAM-based FPGAs offer high logic density, abundant DSP resources, and support for high-speed external memory interfaces.
Selection Criteria for High-Performance Applications
1. Processing Requirements
Evaluate your need for: DSP operations (filtering, FFT, matrix math), logic complexity (state machines, control logic), and memory bandwidth (frame buffering, data streaming). The GW2A-18 suits medium-complexity video and signal processing, while the GW2A-55 handles 4K video and complex AI workloads.
2. Memory Interface Needs
High-performance applications often require external DDR3 memory. The Arora family supports DDR3-800 interfaces. Estimate your bandwidth needs: 1080p60 video requires ~3 Gbps, while 4K30 needs ~12 Gbps. Ensure your selected device has sufficient I/O for your memory configuration.
3. I/O and Interface Requirements
Count high-speed interfaces: MIPI CSI-2 for cameras, HDMI/DisplayPort for video output, Ethernet for networking, PCIe for host connectivity. The QN88 package offers 120 user I/Os, while QN132 provides 176 I/Os for complex systems.
4. Power and Thermal Considerations
Arora devices consume more power than LittleBee due to SRAM configuration and higher performance. Typical power ranges from 1W (simple designs) to 4W (fully utilized). Plan for appropriate thermal management including heatsinks for high-power applications.
Application Guidelines
Video Processing (1080p): GW2A-18 with DDR3 for frame buffering.
Video Processing (4K): GW2A-55 with multiple DDR3 interfaces.
Edge AI Inference: GW2A-18 for simple models, GW2A-55 for complex networks.
Software Defined Radio: GW2A-55 for high sample rate processing.
Industrial Vision: GW2A-18 for single-camera, GW2A-55 for multi-camera.
Development Strategy
Start with the Tang Nano 9K for algorithm development and proof-of-concept. The GW1NR-9 device provides similar architecture to Arora family. Once validated, migrate to your target Arora device for production.
💡 FAE Insights
⚠️ Common Pitfalls
- ✗ Under-estimating memory bandwidth requirements for video applications
- ✗ Overlooking thermal design leading to throttling or reliability issues
- ✗ Ignoring signal integrity for high-speed DDR3 interfaces
- ✗ Insufficient margin in logic utilization for timing closure
📋 Customer Cases
Broadcast Equipment Manufacturer
Broadcast & Pro AV
Challenge
The customer needed a cost-effective FPGA solution for real-time 4K video format conversion (HDMI to SDI with color space conversion). Existing solutions used expensive FPGAs from tier-1 vendors, making their product uncompetitive. The video processing required 4K60 throughput with 4:4:4 color sampling, demanding high memory bandwidth for frame buffering and significant logic for color space conversion. Power budget was limited due to compact enclosure.
Solution
We implemented the solution using GW2A-55 with dual DDR3 interfaces. One DDR3 handled input frame buffering, the other output buffering, enabling seamless frame rate conversion. The 128 DSP blocks accelerated the color matrix calculations.
Customer Feedback
"The customer was impressed by the performance achieved at such a competitive price point. They particularly appreciated the comprehensive reference design provided by the FAE team, which accelerated their development timeline by three months. The thermal design guidelines were accurate, and their first prototype worked without issues. They have since adopted Gowin FPGAs as their standard platform for video products. Successfully processed 4K60 video with <1 frame latency. Product cost reduced by 60% compared to previous FPGA solution. Power consumption stayed within 8W budget with proper thermal design. Product became competitive in broadcast market."
Frequently Asked Questions
1. How many DSP blocks do I need for my signal processing application?
DSP block requirements depend on your algorithm complexity and throughput: For FIR filters: one DSP per tap per sample rate. A 100-tap filter at 100 MHz sample rate needs 100 DSP blocks. For FFT: radix-2 butterfly needs 2 DSP blocks per stage. A 1024-point FFT needs about 20 DSP blocks. For matrix multiplication: each multiply-accumulate needs one DSP block per clock cycle. Video processing: color space conversion needs ~10 DSP blocks, scaling filters need 20-40 depending on quality. The GW2A-18 provides 48 DSP blocks, GW2A-55 provides 128. If your design is DSP-limited, consider time-multiplexing DSP blocks or using distributed logic for lower-precision operations. Gowin's IP cores optimize DSP usage automatically.
2. What DDR3 memory bandwidth can I achieve with Arora FPGAs?
Arora FPGAs support DDR3-800 interfaces providing up to 800 Mbps per data pin. Bandwidth calculation: 16-bit interface at 800 Mbps = 12.8 Gbps theoretical, ~10 Gbps effective (80% efficiency). 32-bit interface at 800 Mbps = 25.6 Gbps theoretical, ~20 Gbps effective. For video applications: 1080p60 RGB (24-bit) needs ~3 Gbps - easily handled by 16-bit DDR3. 4K30 needs ~12 Gbps - requires 32-bit DDR3. 4K60 needs ~24 Gbps - may require dual DDR3 interfaces or higher clock rate. Efficiency depends on access pattern - sequential access achieves higher efficiency than random access. The GW2A-55 can support multiple DDR3 interfaces for bandwidth-hungry applications.
3. How do I manage thermal design for Arora FPGAs?
Thermal management is critical for Arora FPGAs, especially in high-performance applications. Power estimation: Simple designs use 1-2W, medium complexity 2-3W, high-performance designs 3-5W. Thermal analysis steps: 1) Estimate power using Gowin Cloud Designer. 2) Calculate junction temperature: Tj = Ta + (Power × Theta-JA). Theta-JA for QN88 is typically 15-20°C/W. 3) For Tj > 85°C, add heatsink. 4) For Tj > 100°C, consider forced airflow. Heatsink selection: Small heatsinks (20x20mm) reduce Theta-JA by 5-10°C/W. Larger heatsinks with fins provide 10-15°C/W reduction. Thermal interface material (TIM) improves heat transfer. PCB design: Use thermal vias under the FPGA, connect to copper pours. Consider industrial (I7) grade for high-temperature environments.
4. Can I use PCI Express with Arora FPGAs?
Yes, Arora FPGAs support PCI Express through their high-speed SerDes transceivers. Supported configurations: PCIe Gen1 (2.5 Gbps per lane), PCIe Gen2 (5.0 Gbps per lane). Available lane configurations: x1, x2, x4 depending on device and package. The GW2A-55 in QN132 supports up to PCIe Gen2 x4. Implementation requires: Gowin's PCIe IP core (available in IP catalog), reference clock (100 MHz), proper PCB layout for high-speed signals. Use cases: Host interface for accelerator cards, high-speed data acquisition, video capture cards. Note that PCIe implementation consumes significant FPGA resources (several thousand LUTs) and requires careful timing closure. For simpler host interfaces, consider USB 2.0 or Ethernet which require fewer resources.
5. What is the difference between GW2A-18 and GW2A-55 devices?
The GW2A-18 and GW2A-55 are the two main Arora FPGA devices with different capacity levels: GW2A-18 features 18,720 LUT4s, 48 DSP blocks (18x18 multipliers), 828 Kbits of block RAM, and up to 120 user I/Os in QN88 package. It's ideal for 1080p video processing, single-camera vision systems, and moderate AI inference workloads. GW2A-55 offers 54,720 LUT4s, 128 DSP blocks, 2,484 Kbits of block RAM, and up to 176 user I/Os in QN132 package. It handles 4K video, multi-camera systems, and complex neural networks. The GW2A-55 also supports more DDR3 interfaces and higher PCIe lane counts. Choose GW2A-18 for cost-sensitive applications with moderate requirements. Select GW2A-55 when you need maximum performance and can accommodate the larger package size.