RISC-V Processor IP
Configurable 32-bit RISC-V processor core with FPU and cache support for embedded applications.
Product Overview
Description
The Gowin RISC-V Processor IP is a fully configurable 32-bit RISC-V ISA compatible core optimized for FPGA implementation.
Features include optional floating-point unit (FPU), configurable cache sizes, and integrated debug support via JTAG.
Ideal for embedded control, IoT gateways, and system-on-chip designs requiring a compact yet capable processor.
Product Series
RISC
Primary Application
Embedded control systems
Key Features
- RISC-V RV32IMACF ISA compatible
- 5-stage pipeline for performance
- Optional single-precision FPU
- Configurable instruction/data cache
- JTAG debug interface
- GDB and OpenOCD support
- AHB/AXI bus interfaces
- Interrupt controller included
Specifications
| Voltage Rating | 25V DC |
|---|---|
| Current Rating | 1A |
| Temperature Range | -40°C to +85°C |
| Package | SOP-8 |
| Architecture | 32-bit RISC-V RV32IMACF |
| Pipeline | 5-stage |
| Max Frequency | 100-150 MHz (device dependent) |
| Core Size | 3K-15K LUTs (configurable) |
| DMIPS | 1.5 DMIPS/MHz |
| FPU | Optional single-precision |
| Cache | Configurable I/D cache (0-32KB) |
| Debug | JTAG + GDB support |
Applications
Embedded control systems
Industrial automation and control
IoT gateways
Electronic system design
System-on-chip designs
Electronic system design
Industrial controllers
Industrial automation and control
Smart sensor nodes
Sensor signal conditioning
FAE Expert Insights
"Based on extensive field experience, this product delivers excellent performance across various operating conditions. The design incorporates proven architecture with robust protection features. Customers consistently report high satisfaction with reliability and ease of integration."
Excellent choice for industrial applications
— Michael Chen, BeiLuo
Frequently Asked Questions
What RISC-V extensions are supported?
The Gowin RISC-V core supports RV32I (base integer), M (integer multiply/divide), A (atomic operations), C (compressed instructions), and F (single-precision floating-point). This provides compatibility with standard RISC-V toolchains and libraries. The core is validated against the RISC-V compliance test suite.
Verify your software requirements against supported extensions. Most embedded applications work well with RV32IMACF.
What development tools are available?
The RISC-V core works with standard RISC-V GCC toolchain, GDB debugger, and OpenOCD. Gowin provides integration with the Gowin Cloud Designer for system-level design. Software development can use standard IDEs like VS Code, Eclipse, or command-line tools. Example projects include bare-metal and FreeRTOS implementations.
Use standard RISC-V toolchain. Gowin provides example projects and BSP (Board Support Package) for quick start.