GJGD1201

The desaturation detection circuit for GJGD1201 requires a high-voltage diode (desat diode), a blanking capacitor, and a blanking resistor. Connect the desat diode (cathode) to the IGBT collector and the anode to the DESAT pin of the driver. The blanking capacitor (typically 100pF) connects between DESAT pin and ground to set the blanking time during switching. The blanking resistor (typically 100Ω) is in series with the desat diode to limit current. During normal operation, when the IGBT is on, the desat diode is forward biased and the DESAT pin voltage is approximately one diode drop above VCE(sat). During a short circuit, VCE rises above the desaturation threshold (typically 7-9V), and the driver shuts down the gate drive with soft shutdown. The blanking time prevents false triggering during normal switching. Gejian provides reference circuits and calculation tools for desaturation circuit design.

Connect desat diode from IGBT collector to DESAT pin. Use 100pF blanking capacitor and 100Ω resistor. Contact our FAE team for desat circuit design.

The Miller clamp in GJGD1201 prevents false turn-on of the IGBT caused by Miller capacitance coupling during high dv/dt switching. When the opposite switch in a bridge configuration turns on rapidly, the dv/dt across the IGBT creates a displacement current through the Miller capacitance (Cgc) that flows into the gate. This current can raise the gate voltage above the threshold voltage, causing unwanted turn-on and potentially shoot-through. The Miller clamp provides a low-impedance path (internal MOSFET) between gate and emitter when the driver output is low. If the gate voltage rises above approximately 2V during the off state, the Miller clamp activates and sinks the Miller current, preventing the gate voltage from reaching the threshold. This is particularly important for IGBTs with lower threshold voltages and in applications with high dv/dt. The Miller clamp eliminates the need for a negative gate voltage in many applications, though negative voltage is still recommended for highest reliability.

Miller clamp prevents false turn-on from dv/dt. Use negative gate voltage for highest reliability. Contact our FAE team for Miller effect mitigation.

The GJGD1201 requires isolated power supplies for proper operation. The input side (control side) requires a 3.3V or 5V supply for the logic interface. The output side (gate drive side) requires a +15V to +20V positive supply and a negative supply of -3V to -8V (or ground if negative voltage is not used). The total supply voltage (VCC2 - VEE2) should be 15-25V. For high-side switches in bridge configurations, the gate drive supply must be floating and referenced to the switch emitter. This is typically achieved using bootstrap circuits or isolated DC-DC converters. Bootstrap circuits are simpler and lower cost but require the switch to turn on periodically to refresh the bootstrap capacitor. Isolated DC-DC converters provide continuous power but are more expensive. The power supply should have low ripple and be capable of providing the peak current required for switching. Decoupling capacitors (10-47μF electrolytic plus 100nF ceramic) should be placed close to the driver pins.

Use +15V/-8V isolated supply for output side, 3.3V/5V for input side. Bootstrap or isolated DC-DC for high-side. Contact our FAE team for power supply design.

The GJGD1201 has typical propagation delays of 100-150ns from input to output. The propagation delay is well-matched between high-side and low-side drivers (typically within 20ns), which is important for maintaining dead time in bridge configurations. The propagation delay does not vary significantly with temperature or supply voltage within the recommended operating range. When designing dead time for bridge topologies, the propagation delay should be considered along with the IGBT switching times. The total dead time should be sufficient to prevent shoot-through while minimizing dead time losses. Typical dead times are 1-3μs for IGBT applications. The GJGD1201 does not include internal dead time generation - this must be implemented in the controller or using external dead time circuits. The fast propagation delay enables high-frequency operation while maintaining precise timing control.

Allow for 100-150ns propagation delay in timing calculations. Implement dead time in controller. Contact our FAE team for timing design.

While the GJGD1201 is primarily designed for IGBTs, it can drive SiC MOSFETs in some applications, though Gejian offers SiC-optimized drivers (GJGD1201S) that are better suited. The GJGD1201's 4A peak current and 100kV/μs CMTI are adequate for many SiC applications. However, there are some considerations: SiC MOSFETs typically require +18V to +20V gate drive for optimal performance, while the GJGD1201 provides +15V. This results in slightly higher RDS(on) but is acceptable for many applications. The Miller clamp helps prevent false turn-on from the high dv/dt of SiC switching. For highest performance with SiC MOSFETs, Gejian's GJGD1201S is recommended as it provides +18V output and enhanced CMTI of 150kV/μs. If using GJGD1201 with SiC, ensure the gate resistor is selected appropriately (typically 5-10Ω) to control the high switching speed and manage EMI.

GJGD1201 can drive SiC MOSFETs but GJGD1201S is optimized for SiC. Use +18V drivers for best SiC performance. Contact our FAE team for SiC gate drive selection.

The GJGD1201 provides a fault output pin (FO) that goes low when a protection event occurs. When troubleshooting fault conditions: Check the fault pin status - if low, a protection event has occurred. Check the power supply voltages - undervoltage lockout activates if VCC2 is below approximately 11V. Check for desaturation faults - these indicate short circuit or overcurrent conditions in the IGBT. Monitor the IGBT VCE during operation - high VCE during conduction indicates desaturation. Check for overtemperature - the driver may shut down if internal temperature is excessive. Verify gate drive signals with an oscilloscope - look for proper voltage levels and switching waveforms. Check for noise on control signals - high noise can cause erratic operation. Verify proper grounding - separate power and control grounds should connect at a single point. Review layout - poor layout can cause noise and reliability issues. Gejian provides detailed troubleshooting guides and application support for fault diagnosis.

Monitor FO pin for fault detection. Check supply voltages and desaturation. Use oscilloscope to verify waveforms. Contact our FAE team for troubleshooting support.