Parallel Operation of Power Modules
This technical reference document provides detailed information about xinleineng product specifications, characteristics, and performance parameters. Use this information to support your design and analysis activities.
Electrical characteristics are specified over the operating temperature range unless otherwise noted. Parameters are guaranteed by design, testing, or statistical analysis. Typical values is the most likely parametric norm at 25°C.
Thermal characteristics require careful attention during system design. The junction-to-ambient thermal resistance depends on the mounting configuration, PCB copper area, and airflow conditions. Use thermal simulation tools to predict operating temperatures under actual conditions.
Reliability data is based on accelerated life testing and field failure analysis. Mean time between failures (MTBF) calculations follow industry-standard methodologies. Contact BeiLuo for detailed reliability reports and qualification data.
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Frequently Asked Questions
1. What are the main challenges when paralleling power modules?
The main challenges in paralleling power modules are: 1) Static current sharing - ensuring equal current distribution during steady-state conduction, 2) Dynamic current sharing - preventing current imbalance during switching transitions, 3) Thermal imbalance from uneven current distribution, and 4) Protection coordination to prevent cascade failures. These challenges arise from variations in device characteristics, circuit parasitics, and thermal conditions between parallel paths.
2. How can I achieve good static current sharing?
Good static current sharing requires matched device characteristics and symmetric layout: 1) Select modules from the same production lot to minimize Vce(sat) variation, 2) Use small series resistors (0.01-0.1 ohm) in each emitter/source path to provide negative feedback, 3) Ensure equal thermal conditions for all modules on a common heatsink, and 4) Use a common gate driver with individual gate resistors for each module. With these measures, current imbalance can be kept within 10%.
3. What layout techniques improve dynamic current sharing?
For good dynamic current sharing: 1) Use symmetrical PCB layout with equal trace lengths and impedances to all modules, 2) Implement Kelvin source connections for each module to minimize common source inductance, 3) Place modules close together to reduce loop inductance differences, 4) Use laminated busbars for DC link connections to minimize parasitic inductance, and 5) Consider using small ferrite beads on individual gate leads to dampen oscillations. Simulation of the layout parasitics is recommended before building prototypes.
4. Should I use separate gate drivers or a common driver for paralleled modules?
For two modules in parallel, a common gate driver with individual gate resistors is usually sufficient. For three or more modules, separate but synchronized gate drivers provide better control. Separate drivers allow individual adjustment of gate timing to compensate for layout asymmetries. If using separate drivers, ensure they have matched propagation delays (within 20ns) and use a common PWM signal to maintain synchronization. Always include individual desaturation protection for each module.
5. How do I protect paralleled modules against short circuits?
Short circuit protection for paralleled modules requires: 1) Individual desaturation detection for each module to identify which module sees the fault, 2) Soft shutdown of all modules simultaneously to prevent voltage overshoots, 3) Current sensors in each parallel path for overcurrent detection, and 4) Fuse or circuit breaker coordination to isolate faulted modules. Do not rely on a single protection circuit for multiple paralleled modules, as current imbalance may prevent timely detection.
6. What is the maximum number of modules that can be paralleled?
While there is no absolute limit, practical considerations typically limit paralleling to 2-4 modules. With more modules, achieving good current sharing becomes increasingly difficult due to layout constraints and device variations. For very high current requirements, consider using higher current rated modules or custom modules instead of paralleling many standard modules. If paralleling more than 4 modules is necessary, extensive characterization and derating (typically 10-15%) is recommended.
7. Can I parallel IGBT and SiC modules together?
Paralleling IGBT and SiC modules is not recommended due to their different switching characteristics. SiC MOSFETs switch much faster than IGBTs, which would result in severe dynamic current imbalance and potential device failure during switching transitions. If mixed technologies are required in a system, use them in separate converter stages (e.g., SiC for high-frequency DC-DC, IGBT for line-frequency inverter) rather than paralleling them in the same switch position.