AU5405

✓ In Stock

PCIe-compliant clock generator supporting Gen4 and Gen5 with spread spectrum modulation and 8 HCSL outputs.

Product Overview

Description

The AU5405 is a dedicated PCIe clock generator compliant with PCI Express Gen4 and Gen5 specifications. It provides reference clocks for PCIe endpoints and root complexes with integrated spread spectrum modulation.

With 8 HCSL outputs, the AU5405 can drive multiple PCIe slots and devices. The integrated spread spectrum modulation reduces EMI by ±0.5% down-spreading, meeting PCIe specifications without external components.

The device supports 100MHz and 25MHz reference frequencies commonly used in PCIe systems. Outputs can be individually enabled through SMBus interface for power management.

Product Series

AU

Primary Application

PCIe slot clocks

Key Features

  • PCIe Gen4/5 compliant
  • 8 HCSL outputs
  • Integrated spread spectrum
  • Individual output enable
  • SMBus configuration
  • Low power consumption

Specifications

Compliance PCIe Gen4/Gen5
Outputs 8 HCSL
Frequency 100MHz
Spread Spectrum ±0.5% down
Phase Jitter <1ps RMS
Package QFN-32

Applications

PCIe slot clocks

Electronic system design

Server motherboards

Electronic system design

Workstation systems

Electronic system design

Storage controllers

Industrial automation and control

Network adapters

Communication and interface

Documents & Resources

FAE Expert Insights

D

"The AU5405 is our go-to PCIe clock generator. It meets all PCIe Gen4/5 requirements including the tight phase jitter specs. The integrated spread spectrum saves board space and BOM cost compared to discrete solutions. I've used it in multiple server designs with excellent results. The SMBus interface is handy for enabling/disabling clocks for power management. One thing to note: the HCSL outputs need proper termination - follow the PCIe CEM spec. Overall, a cost-effective PCIe clock solution."

PCIe Gen4/5 compliant clock generator with integrated spread spectrum

— David Chen, BeiLuo

Frequently Asked Questions

Is the AU5405 PCIe Gen5 compliant?

Yes, the AU5405 meets all PCI Express Gen5 clock specifications including phase jitter requirements (<1ps RMS). It is backward compatible with Gen4, Gen3, Gen2, and Gen1. The device has been tested and validated against PCIe CEM and PHY test specifications.

AU5405 is fully compliant with PCIe Gen4 and Gen5 specifications.

PCIe Gen5 PCIe compliance clock specification
Do I need external spread spectrum modulation?

No, the AU5405 includes integrated spread spectrum modulation. It provides ±0.5% down-spreading centered at 100MHz, meeting PCIe EMI requirements without external components. The spread spectrum can be enabled or disabled through SMBus if needed for specific applications.

Integrated spread spectrum eliminates need for external modulation circuitry.

spread spectrum EMI reduction PCIe EMI
What termination is required for HCSL outputs?

HCSL outputs require 50Ω termination to ground at the receiver end. The AU5405's HCSL outputs are current-mode and require this termination for proper voltage levels. Follow the PCIe CEM specification for trace routing and termination. For multi-slot designs, ensure each slot has proper termination.

Use 50Ω to ground termination at each HCSL receiver per PCIe spec.

HCSL termination PCIe clock termination 50 ohm termination
Can I disable spread spectrum for testing?

Yes, spread spectrum can be enabled or disabled via SMBus register 0x01 bit 7. When disabled, the output is a clean 100MHz clock without modulation. This is useful for testing and debugging. However, for production systems, spread spectrum should be enabled to meet EMI requirements. The spread spectrum profile is fixed at ±0.5% down-spread when enabled.

Spread spectrum can be disabled via SMBus for testing; enable for production EMI compliance.

spread spectrum disable SMBus control testing
What is the power consumption of AU5405?

AU5405 power consumption depends on the number of enabled outputs: (1) All outputs disabled - 15mA typical; (2) Single output enabled - 25mA; (3) All 8 outputs enabled - 85mA typical at 3.3V. This translates to approximately 280mW maximum power consumption. The device supports output enable/disable via SMBus for power management in systems that don't require all clocks simultaneously.

~280mW max with all outputs; use SMBus to disable unused outputs for power savings.

power consumption output enable power management